Michigan CELAB Reading Group

2003

Date	Place	Papers	Food
6/02/2004 Noon Attendance:	2311 EECS	Exploiting Compiler-Generated Schedules for Energy Savings in High-Performance Processors Mike Geiger . Kevin Lim	Mike Geiger $$ - Brehob
5/26/2004 Noon Attendance: 20	2311 EECS	Problems with NICs Nate Binkert	Nate Clark $$ - Reinhardt
5/19/2004 Noon Attendance: 15	2311 EECS	Evaluating the Imagine Stream Architecture Dan Ernst Evaluation of the RAw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams Leyla Nazhandali	Paul Toth Mr. Pita $$ - Mudge
5/12 Noon Attendance: 21	2311 EECS	Selective Eager Execution on the PolyPath Architecture Mark Brehob Dual Path Instruction Processing Paul Toth	Leyla Nazhandali i $$ - Austin
5/5 Noon	2311 EECS	Exploring the Limits of Prefetching Tom Puzak	Dan Ernst $$ - Mahlke
4/28 Noon	2311 EECS	Exploring Wakeup-Free Instruction Scheduling Kevin Fan Signature Buffer: Bridging Performance Gap between Registers and Caches K.V. Manjunath	Doug MacKay $$ - Brehob
4/21 Noon	2311 EECS	Ciruit Aware Architectural Simulation Todd Austin Compiler-Decided Dynamic Memory Allocation for Scratch-Pad Based Embedded Systems Matthew Martino	Erik Hallnor Pizza $$ - Reinhardt
Apr 14 Noon	2311 EECS	Exploring the Limits of Prefetching (starts at 12:30 in 1005 EECS) Tom Puzak	Rajiv Ravindran Anthony's $$ - Mudge
Apr 7 Noon	2311 EECS	Organizing the Last Line of Defense before Hitting the Memory Wall for CMPs Mike Chu Universal Mechanisms for Data Parallel Architectures Rajiv Ravindran	Tae Ho Kgil Chinese $$ - Austin
Mar 31 1:00 Attendance: 24	2311 EECS	Next-Generation Wireless LAN Technology (starts at 1:30 in GGB 1504) Teresa Meng	Ryan Helfand Pizza $$ - Mahlke
Mar 24 Noon Attendance: 18	2311 EECS	ChipLock - Architectural Support for Security Tae ho Kgil Fast Path-Based Neural Branch Prediction Jeff Ringenberg	Ali Saidi Einstein's Bagel Sandwiches $$ - Brehob
Mar 17 Noon Attendance: 19	2311 EECS	Exploiting the Cache Capacity of a Single-chip Multi-core Processor with Execution Migration Lisa Hsu Using Prime Numbers for Cache Indexing to Eliminate Conflict Misses Erik Hallnor	Ron Dreslinski Marco's $$ - Reinhardt
Mar 10 Noon Attendance: 26	2311 EECS	A New Look at Exploiting Data Parallelism in Embedded Systems Scott Mahlke Misc. Research Trevor Mudge	Seokwoo Lee Jimmy John's $$ - Mudge
Mar 3 12:30 Attendance: 22	2311 EECS	Power-driven Design of Router Microarchitectures in On-chip Networks Seokwoo Lee Using Interaction Costs for Microarchitectural Bottleneck Analysis Nate Clark	Chris Drake Lucky Kitchen $$ - Austin
Feb 25 12:30 Attendance: 18	2311 EECS	Beating in-order stalls with "flea-flicker" two-pass pipelining Chris Drake Macro-op Scheduling: Relaxing Scheduling Loop Constraints Eric Larson	Manjunath Kudlur Anthony's $$ - Mahlke
Feb 18 12:30 Attendance: 22	2311 EECS	VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power Ryan Helfand Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures Doug MacKay	Matt Martino Marco's $$ - Brehob
Feb 11 12:30 Attendance: 23	2311 EECS	Checkpoint Processing and Recovery Kevin Lim WaveScalar Hongtao Zhong	Lisa Hsu Ahmo's $$ - Reinhardt
Feb 4 12:30 Attendance: 26	2311 EECS	Exploiting Value Locality in Physical Register Files Ali Saidi Hardware Support for Control Transfers in Code Caches Ron Dreslinski	Jeff Ringenberg Sabor Latino $$ - Mudge
Jan 28 12:30 Attendance: 27	2311 EECS	Optimum Power/Performance Pipeline Depth Mike Geiger Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data Eric Castle	Hongtao Zhong Evergreen $$ - Austin
Jan 21 12:30 Attendance: 30	2311 EECS	Research Overview (practice talk) Nate Binkert	Kevin Fan Papa Romano's $$ - Mahlke
Jan 14 12:30	2311 EECS	Single-ISA Heterogeneous Multi-Core Architectures: The potential for Processor Power Reduction Tae Ho Kgil	Nate Binkert Exotic Bakeries $$ - Brehob
Nov 19 Noon	2311 EECS	Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation Dan Ernst Uniprocessor Performance Enhancement Through Adaptive Clock Frequency Control Drew Hamel	Mike Geiger Pizza $$ - Austin
Nov 12 Noon	2311 EECS	Micropipelines Mark Brehob	Yuan Lin Jimmy John's $$ - Reinhardt
Nov 5 Noon	2311 EECS	Topic: Program Analysis Picking Statistically Valid and Early Simulation Points Todd Austin Miss Rate Prediction across All Program Inputs K.V. Manjunath	Rajeev Krishna Marco's $$ - Mudge
Oct 29 Noon	2311 EECS	Topic: Code Compression Reducing Code Size With Echo Instructions Kevin Fan Code Optimization for Code Compression Matt Martino	Nate Clark Cottage Inn $$ - Austin
Oct 22 Noon	2311 EECS	Topic: Dynamic Translation/Optimization DAISY: Dynamic Compilation for 100% Architectural Compatibility Mike Chu Dynamo: A Transparent Dynamic Optimization System Rajiv Ravindran	Jeff Ringenberg Papa John's $$ - Mahlke
Oct 15 Noon	2311 EECS	Topic: Dave Oehmke Doubleheader! Power Efficient Cache Coherence Dave Oehmke JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers Dave Oehmke	Drew Hamel TBD $$ - Brehob
Oct 8 Noon	2311 EECS	Topic: MEMS Desigining Computer Systems with MEMS-Based Storage Lisa Hsu Next century challenges: mobile networking for "Smart Dust" Erik Hallnor	Eric Larson Fazoli's $$ - Reinhardt
Oct 1 Noon	2311 EECS	Global Resource Sharing for Synthesis of Control Data Flow Graphs on FPGAs Nate Clark Data Communication Estimation and Reduction for Reconfigurable Systems Scott Mahlke	Nam Kim Pizza $$ - Mudge
Sep 24 Noon	2311 EECS	The Impact of Resource Partitioning on SMT Processors (PACT practice talk) Steve Raasch	Dan Ernst Marco's Pizza $$ - Austin
Sep 17 Noon	2311 EECS	Integrating Superscalar Processor Components to Implement Register Caching Yuan Lin Weird Computers Trevor Mudge	Doug MacKay Jimmy Johns $$ - Mahlke
Sep 10 12:30	1005 EECS	Topic: Preventing Buffer Overflow Attacks Address Obfuscation: An Efficient Approach to Combat a Broad Range of Memory Error Exploits Rajeev Krishna PointGuard: Protecting Pointers from Buffer Overflow Vulnerabilities Eric Larson	Erik Hallnor Marco's Pizza $$ - Brehob
Sep 3 Noon	2311 EECS	Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management Seokwoo Lee Control-Theoretic Dynamic Frequency and Voltage Scaling for Multimedia Workloads Chris Drake	Rajiv Ravindran Pizza $$ - Reinhardt
Aug 27 Noon	2311 EECS	A Pipelined Memory Architecture for High Throughput Network Processors Hongtao Zhong	K.V. Manjunath Madras Masala $$ - Mudge
Aug 6 Noon	1005 EECS	Performance Analysis of the Alpha 21364-Based HP GS1280 Multiprocessor Nate Binkert Profile-based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor Yuan Lin	Dan Ernst Marco's $$ - Austin
Jul 30 Noon	2311 EECS	Y-Branches: When You Come to a Fork in the Road, Take It Scott Mahlke	Doug MacKay Jimmy John's $$ - Mahlke
Jul 23 Noon	2311 EECS	A Highly-Configurable Cache Architecture for Embedded Systems Erik Hallnor DISE: A Programmable Macro Engine for Customizing Applications Eric Larson	Nam Kim Evergreen $$ - Brehob
Jul 16 Noon	2311 EECS	Fun with Razor Todd Austin	Steve Raasch Pizza $$ - Reinhardt
Jul 9 Noon	2311 EECS	Dynamically managing the communication parallelism trade-off in future clustered processors Rajiv Ravindran Phase Tracking and Prediction Doug MacKay	Seokwoo Lee Jimmy John's $$ - Mudge
Jul 2 Noon	2311 EECS	Parallelism in the Front-End Drew Hamel	Hongtao Zhong Chinese $$ - Austin
		A Highly-Configurable Cache Architecture for Embedded Systems Ramu Pyreddy
Jun 25 Noon	2311 EECS	Overcoming the Limitations of Conventional Vector Processors Nate Clark Temperature-Aware Microarchitecture Mike Geiger	Dave Greene Mysore Woodlands $$ - Mahlke
Jun 18 Noon	2311 EECS	A Flight Data Recorder for Enabling Full-system Multiprocessor Deterministic Replay Seokwoo Lee Detecting Global Stride Locality in Value Streams K.V. Manjunath	Andrew Hamel Jimmy John's $$ - Brehob
Jun 11 Noon	2311 EECS	Banked Multiported Register Files for High-Frequency Superscalar Processors Chris Drake Building Quantum Wires: The Long and the Short of it Rajeev Krishna	Nate Clark China Gate $$ - Reinhardt
Jun 4 Noon	2311 EECS	Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay Dan Ernst Region-based Hierarchical Operation Partitioning for Multicluster Processors Mike Chu	Chris Drake Anthony's Pizza $$ - Mudge
May 28th Noon	2311 EECS	Caches and Merkle Trees for Efficient Memory Authentication Mark Brehob Implicitly Multithreaded Processors Lisa Hsu	Rajeev Krishna Shalimar $$ - Austin
May 21st Noon	2311 EECS	Token Coherence: Decoupling Performance and Correctness Steve Reinhardt	Lisa Hsu Lucky Kitchen $$ - Mahlke
May 14th Noon	2311 EECS	SMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling Eric Larson	Kevin Fan Fazoli's $$ - Brehob
Apr 30th 12:30	2311 EECS	Efficient Dynamic Scheduling Through Tag Elimination Dan Ernst Half-Price Architecture	Steve Raasch Pizza $$ - Reinhardt
Apr 23rd 12:30	2311 EECS	Control Techniques to Eliminate Voltage Emergencies in High-Performance Processors Nate Clark	Eric Larson Jimmy John's $$ - Trev
Apr 9th 12:30	2311 EECS	Special: Simpool Discussion TCP: Tag Correlating Prefetchers Lisa Hsu Hierarchical Back-Off Lock for Non-Uniform Communication Architectures Nate Binkert	Rajiv Ravindran TBA $$ - Austin
Apr 2nd 12:30	2311 EECS	A Statistically Rigorous Approach for Improving Simulation Methodology Steve Raasch Dynamic Optimization Of Micro-Operations Eric Larson	Jeff Pizza $$ - Mahlke
Mar 26th 12:30	2311 EECS	MSSP Todd Austin Cost-sensitive Cache Replacement Algorithms Mark Brehob	Nam Chinese $$ - Tyson
Mar 19th 12:30	2311 EECS	Variability in Architectural Simulations of Multi-threaded Workloads Eric Hallnor Microarchitecture and Performance Analysis of a SPARC-V9 Microprocessor for Enterprise Server Systems Chris Drake	Manjunath Shalimar $$ - Brehob
Mar 12th 12:30	2311 EECS	Low-Overhead Selective Re-Execution in the Polymorphic TRIPS Processor Doug Burger	Mike Geiger TBA $$ - Reinhardt
Mar 5th 12:30	2311 EECS	Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors Dan Ernst Mini-threads: Inceasing TLP on Small-Scale SMT Processors Nate Binkert	Chris Drake Lucky Kitchen $$ - Trev
Feb 19th 12:30	1005 EECS	Dynamic Battery State Aware Approaches for Improving Battery Utilization Rajiv Ravindran Fire!	Curt Gomulinski Subway $$ - Austin
Feb 12th 12:30	2311 EECS	Using Internal Redundant Representations... Prof. Austin Dynamic Battery State Aware Approaches for Improving Battery Utilization Rajiv Ravindran Bit Section Instruction Set Extension of ARM... Kevin Fan	Lisa Hsu Cottage Inn Pizza $$ - Mahlke
Feb 5th 12:30	2311 EECS	Drowsy Instruction Caches - Leakage Power Reduction using Dynamic Voltage Scaling Nam Kim Fetching Instruction Streams Nate Clark Energy Efficient Frequent Value Data Cache Design Curt Gomulinski	Dave Oehmke TBD $$ - Tyson
Jan 29th	1005 EECS	Microarchitectural Exploration with Liberty Eric Larson A Framework and Analysis of Modern Graphics Architectures for General-Purpose Computing Rajeev Krishna	Mike Chu Anthony's Pizza $$ - Brehob
Jan 22nd	1005 EECS	Optimizing Pipelines for Power and Performance Ramu Pyreddy Microarchitectural Denial of Service: Insuring Microarchitectural Fairness Steve Raasch Compiler-Directed Instruction Cache Leakage Optimization Scott Mahlke	Rajeev Krishna Indian $$ - Reinhardt
Jan 15th	2311 EECS	Reducing Register Ports for Higher Speed and Lower Energy Mikhail Smelyanskiy Three-Dimensional Memory Vectorization for High Bandwidth Media Memory Systems Dan Ernst	Kevin Fan Chinese $$ - Trev

2002

Date	Place	Papers	Food
November 13th	2311 EECS	ASPLOS paper Steve Reinhardt 570 Presentation Seokwoo Lee	Andew Hamel Jimmy John's $$ - Austin
November 6th	2311 EECS	Erik Hallnor ASPLOS Papaers Misha	Rajiv Ravindran Pizza $$ - Mahlke
October 23rd	2311 EECS	Lisa Hsu ASPLOS Papaers Todd Austin Eric Larson	Mike Geiger Pizza $$ - Tyson
October 16th	2311 EECS	Student Research Presentations Eric Hallnor Ramu Pyreddy	Seokwoo Sushi $$ - Brehob
October 9th	IPoCSE	No Meeting - IPoCSE .	.
October 2nd	1005 EECS	Student Research Presentations Eric Larson	Allen Cheng Korean $$ - Reinhardt
September 25th	1005 EECS	Various Research Topics Faculty(Reinhardt)	Jeff Ringenberg Sabor Latino $$ - Trev
September 18th	3427 EECS	Various Research Topics Faculty(Tyson)	Dan Marco's $$ - Austin
September 11th	2311 EECS	Various Research Topics Faculty(Mahlke)	Nate Clark Pizza $$ - Mahlke
September 4th	2311 EECS	Various Research Topics Faculty(Mudge)	Nam Kim Hoagies $$ - Tyson
August 28th	2311 EECS	Various Research Topics Faculty(Austin)	Raj Krishna Shalimar $$ - Brehob
August 21st	2311 EECS	Simulator Overview Steve Reinhardt	Curt Gomulinski Subs $$ - Reinhardt
August 7th	2311 EECS	Slack: Maximizing Performance Under Technological Constraints Nam Kim ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors Erik Hallnor SafetyNet: Improving the Availability of Shared Memory Multiprocessor s with Global Checkpoint/Recovery Erik Hallnor	Misha Jerusalem Garden $$ - Trev
July 31st	2311 EECS	Reducing the Complexity of the Register File in Dynamic Superscalar Processors Mikhail Smelyanskiy	Eric Larson Mexican $$ - Austin
July 24th	2311 EECS	Critical Power Slope: Understanding the Runtime Effects of Frequency Scaling Ramu Pyreddy Slack: Maxim izing Performance Under Technological Constraints Nam Kim	Ramu Pyreddy Zingermann's $$ - Tyson
July 17th	2311 EECS	Timekeeping in the Memory System: An Efficient Approach to Predicting and Optimizing Memory Behavior Eric Larson Unknown Todd Austin	Nate Binkert Indian $$ - Brehob
July 10th	2311 EECS	Using a User-L evel Memory Thread for Correlation Prefetching Dave Greene	Rajiv Ravindran Anthony's Pizza $$ - Reinhardt
July 3rd	USA	No Meeting . . .	.
June 26th	2311 EECS	Going the Distance for TLB Prefetching: An Application-driven Study Nate Binkert Sim-GALS: A Globally Asynchronous-Locally S ynchronous Processor Simulation Environment Ramu Pyreddy	Mike Chu tba $$ - Mudge
June 19th	2311 EECS	A Large, Fast Instruction Window for Tolerating Cache Misses Steve Raasch	Ramu Pyreddy Subs $$ - Austin
June 12th	2311 EECS	Implementing Optimizations at Decode Time Rajiv Ravindran Managing Configurable Hardware via Dynamic Working Set Analysis Mike Chu Dynamic Fine-Grain Leakage Reduction using Leakage-Biased Bitlines Mark Brehob	Curt Gomulinski pizza $$ - Tyson
May 29th	Anchorage, AK	No Meeting - Out clubbing with Todd . . .	.
May 22nd	2311 EECS	Loose Loops Sink Chips Mikhail Smelyanskiy .	Andew Hamel Subs (Jimmy Johns) $$ - Brehob
May 15th	2246 EECS	A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning Steve Reinhardt The Minimax Cache: An Energy-Efficient Framework for Media Processors Trevor Mudge Let's Study Whole-Program Cache Behaviour Analytically Trevor Mudge Evaluation of a Multithreaded Architecture for Cellular Computing Mike Chu	Steve Raasch Marco's Pizza $$ - Reinhardt
May 8th	2246 EECS	ISCA Talk - Redundant Multithreading Steve Reinhardt	Rajeev Krishna Exotic Bakery
May 1st	2311 EECS	Thread-Spawning Schemes for Speculative Multithreading Eric Larson Improving Value Communication for Thread-Level Speculation Dan Ernst Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay Erik Hallnor Non-vital Loads Nam Kim	Nate Clark Chinese
Apr 24th	2311 EECS	Fine-grain Priority Scheduling for Memory-Intensive Applications Mark Brehob An Instruction Set and Microarchitecture for Instruction Level Distributed Processing Todd Austin Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling Nate Clark	Jason Clemons Cottage Inn
Apr 17th	2311 EECS	Two Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation Scott Mahlke A Scalable Instruction Queue Design Using Dependence Chains Steve Raasch	Eric Larson Fazoli's
Apr 10th	2311 EECS	SV2 Video Todd Austin Tarantula: A Vector Extension of the Alpha Architecture Nathan Binkert	Dave Green Sabor Latino
Apr 3rd	2311 EECS	TTAs: Missing the ILP complexity wall Design of Transport Triggered Architectures Rajiv Ravindran	Mikhail Smelyanskiy Lucky Kitchen
Mar 27th	2311 EECS	AMD SledgeHammer Gary Tyson	Eric Hallnor Pizza
Mar 20th	2311 EECS	TI C6000 Jeff Ringenberg Itanic Scott Mahlke	Rajiv Ravindran Anthony's Pizza
Mar 13th	2311 EECS	A Scalable Approach to Thread-Level Speculation Steve Reinhardt A Dynamic Multithreading Processor Erik Hallnor Multiscalar processors talk Todd Austin	Dan Ernst Subs
Mar 6th	2311 EECS	Pentium 4 Presentation Doug Carmean Eric Sprangle	Nam Kim Korean
Feb 20th	2311 EECS	More Dataflow Steve Reinhardt	Steve Raasch Sabor Latino
Feb 13th	2311 EECS	Non-stalling counterflow architecture Todd Austin Dataflow Trevor Mudge	Rajeev Krishna Shalimar
Feb 6th	2311 EECS	Low Power Embedded Software Optimization using Symbolic Algebra Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches Nate Clark Optimizing Static Power Dissipation by Function Units in Superscalar Processors Architectural and Compiler Support for Energy Reduction in the Memory Hierarchy of High Performance Microprocessors Scott Mahlke Exploiting VLIW Schedule Slacks for Dynamic Leakage Energy Reduction Eric Larson	Wei-Fen Lin
Jan 30th	2311 EECS	Architectural and Compiler Support for Effective Instruction Prefetching: A Cooperative Approach Dave Greene Designing a Modern Memory Hierarchy with Hardware Prefetching Wei Fen Lin Decoupled Access/Execute Computer Architecutres The Astronautics ZS-1 Processor Jeff Ringenberg	Chris Weaver Jerusalem Garden
Jan 23rd	2311 EECS	A design Space Evaluation of Grid Processor Architectures Nathan Binkert Scale: Slides HPCA-6 WIP paper HPCA-6 WIP slides Steve Raasch RAW: Hotchips 2001 Slides Steve Raasch	Eric Larson Fazoli's
Jan 16th	2311 EECS	Continuation of last week's discussion	David Green Lucky Kitchen
Jan 9th	3400 EECS	Xtensa: A Configurable and Extensible Processor Chris Weaver Improv Gary Tyson Lx: A Technology Platform for Customizable VLIW Embedded Processing Rajeev Krishna Pico Scott Mahlke Adaptive Explicitly Parallel Instruction Computing Trevor Mudge How to Build Optimised Products With the ARCtangent-A4 User-Customizable Processor ARC Whitepapers Todd Austin	Mark Brehob Papa Romano's
Dec 19th	3400 EECS	On Pipelining Dynamic Instruction Scheduling Logic Todd Austin Select-Free Instruction Scheduling Logic Steve Reinhardt A High-Speed Dynamic Instruction Scheduling Scheme for Superscalar Processors Dan Ernst	Pat Cassleman Chinese

Faculty Lunch Sponsor Rotation